__________ is the ratio of change of input offset voltage to the variations in temperature.
Input offset voltage 0.0%
Input offset voltage drift 100.0%
Input offset current drift 0.0%
Power supply rejection 0.0%
A ___________ is used to compensate for the distortion of the digital data pulses transmitted over telephone wires.
phase shifter 0.0%
scale changer 0.0%
DC offset 0.0%
RC band filter 0.0%
delay equalizer 100.0%
A 'twisted ring counter' is_______ where N represents a clock pulse.
an N:1 scalar 0%
a 2N:1 scalar 0%
a N:2 scalar 0%
a 3N:1 scalar 0%
A 3-db frequency is the one in which:
resistance is equal to the capacitive reactance. 0%
resistance is half of the capacitive reactance. 0%
resistance is double the capacitive reactance. 0%
resistance is one fourth of the capacitive reactance. 0%
A 4 bit adder requires a ______ bit package.
A 4 bit adder requires a ______ pin package.
A digital system to know whether the sum of binary bits in a particular word is even or odd is known as_______.
demultiplexer 0%
decoder 0%
digital comparator 0%
true complement element comparator 0%
parity checker 0%
A silicon controlled switch (SCS) operates at _______
low current and high voltage. 0.0%
high current and low voltage. 100.0%
high current and high voltage. 0.0%
low current and low voltage. 0.0%
For a band reject filter:
the cut off frequency of a low pass section is greater than the cut off frequency of a high pass section. 0%
the cut off frequency of a low pass section is equal to the cut off frequency of a high pass section. 0%
the cut off frequency of a low pass section is smaller than the cut off frequency of a high pass section. 0%
How is a storage cell identified in the coincident selection method of random access memory?
From the value of the X address line 0%
With the help of a three dimensional matrix 0%
From the value of the Y address line 0%
From the value of the point where X lines and Y lines intersect 0%
How many dots can be generated in a character matrix of a character waveform at a given instant?
How many layers of material are there in the basic structure of an integrated circuit?
How many leads are there in a dual in line package of an integrated circuit?
10 0%
11 0%
12 0%
13 0%
14 0%
If a 256 bit read only memory is arranged in 40 words of 10 bits each, how many emitters along with the encoder does it consist of?
If a person wants to read or write 20 words of 10 bits each, how many storage cells will be used?
100 0%
200 0%
300 0%
400 0%
If in the above diagram, the binary coded decimal's input is 0101, and 0 for any other input, what will be its output?
If the analog voltage in an analog to digital converter is 4 volts, how many pulses will it generate?
If the input to an operational amplifier comparator is a sine wave, the output will be a ___________
sine wave with positive and negative pulses. 0%
sine wave with only negative pulses. 0%
square wave with positive and negative pulses. 0%
square wave with only positive pulses. 0%
If the MOSFET has a thin oxide gate,
its threshold voltage is high. 0%
its threshold voltage is low. 0%
logic 0 is not detected on the bit line. 0%
If the signal power delivered to load is 5 watts and the electric power supply to the output circuit is 10 watts, calculate the collector circuit efficiency?
25% 0%
50% 0%
75% 0%
100% 0%
If the transition of a binary is made from state 0 to 1, the output makes a transition from state 1 to 0. This is a characteristic of_______.
divide by N counter 0%
ripple counter 0%
synchronous counter 0%
up-down counter 0%
In a 'race around' condition of an integrated circuit, _______
the clocked pulse train will be equal to 1. 0%
for a particular time period of pulse, the output will be 0. 0%
for a particular time period of pulse, the output will be 1. 0%
the output will oscillate between 0 and 1. 0%
In a ladder type D/A converter, _______
twice the number of resistances is equal to the number of bits. 0%
the number of resistances is equal to the number of bits. 0%
thrice the number of resistances is equal to the number of bits. 0%
half the number of resistances is equal to the number of bits. 0%
In a paraphase amplifier, _______
1 output is equal in magnitude but opposite in a phase. 0%
2 outputs are equal in magnitude but opposite in a phase. 0%
3 outputs are equal in magnitude but opposite in a phase. 0%
4 outputs are equal in magnitude but opposite in a phase. 0%
In a register, the n number of flip flops can store_______.
n- bit words 0%
(n – 1) bit words 0%
(n + 1) bit words 0%
(1 / n) bit words 0%
In a Schottky transistor, what is the value of the base to the collector voltage?
0.2 volt 0%
0.3 volt 0%
0.4 volt 0%
0.6 volt 0%
In an ideal operational amplifier, the value of input resistance R is equal to _______.
In an integrated circuit, how many outputs does an OR gate have?
In an integrated circuit, what number of gates on a chip is considered a small scale integration?
Less than 12 gates 0%
Between 15 to 20 gates 0%
Between 20 to 30 gates 0%
More than 30 gates 0%
In isolation diffusion, _______
n-type impurities penetrate the p- type epitaxial layer. 0%
p- type impurities penetrate the n- type epitaxial layer. 0%
p- type impurities reach the n-type substrate. 0%
n- type impurities reach the p- type substrate. 0%
In which among the following classes of amplifiers does the current flow all the time in the output circuit?
Cass A 0%
Class B 0%
Class AB 0%
Class C 0%
In which among the following is the masking and etching process used to make an opening in the p- type region?
Isolation diffusion 0%
Based diffusion 0%
Emitter diffusion 0%
Epilaxial diffusion 0%
In which among the following types of circuits is it possible to fabricate PNP and NPN transistors within the same Silicon substrate?
Hybrid circuits 0%
Dielectric isolated integrated circuits 0%
Beam lead monolithic circuits 0%
In which among the following waveform generators is the circuit referred to as 'one shot'?
A triangle wave generator 0%
A square wave generator 0%
A pulse generator 0%
Parasitic capacitance is:
the sum of the capacitance from the bottom of the n- type region and the sidewalls of the isolation islands to the p+ region. 0%
the difference of the capacitance from the bottom of the n- type region and the sidewalls of the isolation islands to the p+ region 0%
the square of the capacitance from the bottom of the n- type region and the sidewalls of the isolation islands to the p+ region. 0%
the product of the capacitance from the bottom of the n- type region and the sidewalls of the isolation islands to the p+ region. 0%
The above diagram represents a _______.
1 bit memory 0%
2 bit memory 0%
3 bit memory 0%
4 bit memory 0%
The decoder in an MOS-ROM contains:
NAND gates which are non static. 0%
NOR gates which are static. 0%
NAND gates which are static. 0%
NOR gates which are non static. 0%
The input resistance of an AC voltage follower is ___________.
10 M at 150 Hz 0%
12 M at 100 Hz 0%
1 M at 15 Hz 0%
1 M at 150 Hz 0%
The p- type substrate of an integrated circuit has a resistivity of:
10 ohmic centimeters 0%
20 ohmic centimeters 0%
30 ohmic centimeters 0%
40 ohmic centimeters 0%
The phase of a sinusoidal input voltage undergoes a phase shift from_______.
0° to 180° 0%
0° to 360° 0%
0° to 90° 0%
0° to 270° 0%
The quiescent value Ic is equal to_______ Here Im is peak sinusoidal current.
Im√2 0%
√Im 0%
√2 / Im 0%
Im / √2 0%
The region of the transistor of an integrated circuit in which both the emitter and the collector junctions are forward biased is known as the:
cut off region. 0%
saturation region. 0%
active region. 0%
The resistivity of a conductor in an integrated circuit is 10 ohms meter and the thickness of the conductor is 10 meters. Calculate the resistance of the conductor?
1 ohm 0%
20 ohms 0%
100 ohms 0%
10 ohms 0%
The television tube is an example of a_______.
DC voltage follower 0%
current to voltage convertor 0%
voltage to current convertor 0%
The time during which the anode voltage should be kept below the maintaining voltage till a critical value is achieved is known as the:
turn on time. 0%
gate recovery time. 0%
turn off time. 0%
gate time to hold. 0%
The time required for the collector current to rise to a value of 10% of its maximum is known as:
delay time. 0%
rise time. 0%
fall time. 0%
storage time. 0%
The weight of the most significant bit (MSB) is:
twice the stable reference voltage. 0%
thrice the stable reference voltage. 0%
half the stable reference voltage. 0%
equal to the stable reference voltage. 0%
What does the above symbol represent?
Half binary adder 0%
Full binary adder 0%
MSI adder 0%
Parallel operation adder 0%
What does the bottom layer in an integrated circuit consist of?
p- type silicon 0%
n- type silicon 0%
Silicon Dioxide 0%
Aluminium 0%
What is a flip flop?
A feedback combination which can never be locked or latched in a place 0%
A feedback combination which is a 5 bit memory unit 0%
A feedback combination which can exist in only one stable state 0%
A feedback combination in which the output of a single input NAND gate is connected to the input of the other gate 0%
What is the conduction angle?
The duration for which the silicon controlled rectifier is off 0%
The duration for which the silicon controlled rectifier is on 0%
The angle at which the control voltage exceeds the breakdown voltage 0%
The angle at which the trigger breakdown voltage exceeds the controlled voltage 0%
What is the correct expression for the common mode rejection ratio where Vd is the differential voltage gain, and Vc is the common mode voltage gain
Vd / Vc 0%
Vd – Vc 0%
Vd + Vc 0%
Vd x Vc 0%
What is the range of the resistance of a thin film resistor?
20Ώ to 50K 0%
50Ώ to 100K 0%
200Ώ to 500K 0%
2Ώ to 5K 0%
What is the second stage of an integrated operational amplifier?
Differential amplifier with a double ended output 0%
DC level translator input and a driver output 0%
Differential amplifier with a single ended output 0%
Emitter flow 0%
What is the slew rate in a monolithic operational amplifier?
10 volts per micro second 0%
5 volts per micro second 0%
1 volt per micro second 0%
2 volts per micro second 0%
What is the value of the lower base emitter breakdown voltage?
~7 volts 0%
~8 volts 0%
~9 volts 0%
~10 volts 0%
What is the value of the voltage difference existing between the two logic levels of an emitter coupled logic?
500 milli volts 0%
600 milli volts 0%
700 milli volts 0%
800 milli volts 0%
When a bit 1 is present on the MSB line, _______
the single pole double throw switch (SPDT) connects the resistor to the reference voltage. 0%
the single pole double throw switch (SPDT) connects the resistor to the ground. 0%
the analog voltage becomes proportional to the digital input. 0%
Which among the above diagram is an unblinking waveform for a character generator system?
Which among the following applications of a counter is related to the transmission and reflection of a pulse over a period of time?
Measurement of frequency 0%
Measurement of time 0%
Measurement of distance 0%
Measurement of speed 0%
Which among the following flip flops changes the state of an output with each clock pulse just like a toggle switch?
S-R flip flop 0%
J-K flip flop 0%
T flip flop 0%
D flip flop 0%
Which among the following is a characteristic of 'ratio less' powerless circuits?
All the devices are of minimum geometry. 0%
The chip size is quite large for a specified number of gates. 0%
The output depends upon the ratio of resistance. 0%
The output is independent of the ratio of resistance. 0%
Which among the following is a characteristic of programmable attenuator?
It is used as a fixed reference voltage. 0%
The output is the sum of the digital word and the analog voltage. 0%
The output voltage is twice the input voltage. 0%
The output depends upon the binary word. 0%
Which among the following is a parallel plate capacitor?
Thin film capacitor 0%
Junction capacitor 0%
Monolithic capacitor 0%
Which among the following is correct of an 'Encoder'?
It accepts an M-bit word. 0%
Only one of the inputs is in state 1. 0%
It generates an N-bit code. 0%
It establishes the state 1 on only 1. 0%
Which among the following is not a characteristic of MOS circuits?
Low packing density 0%
Small power consumption 0%
Low cost 0%
High packing density 0%
High power consumption 0%
Which among the following is not an element of medium scale integration?
Read only memories 0%
Shift registers 0%
Counters 0%
Decoders 0%
Which among the following is the correct expression for the 'voltage gain' of a transistor?
Input voltage – Output voltage 0%
Input voltage + Output voltage 0%
Input voltage / Output voltage 0%
Output voltage / Input voltage 0%
Which among the following is the correct function for the low 3-db frequency where R is the resistor and C is the capacitor
1 / 2π RC 0%
2πRC 0%
1/RC 0%
RC / 2π 0%
Which among the following methods of compensation introduces Phase lag into the amplifier?
Pole zero or lag lead compensation 0%
Lead compensation 0%
Dominant pole compensation 0%
Which among the following networks has two inputs and gives an output which is proportional to the difference between the signals at the two inputs?
Feedback network 0%
Mixer network 0%
Sampling network 0%
Signal source network 0%
Which among the following shift registers is DC stable and is able to work without a minimum clock rate?
Three phase shift register 0%
Four phase shift register 0%
Dynamic MOS shift register 0%
Static MOS shift register 0%
Which among the following shift registers is used to perform multiplication or division by multiples of 2?
A parallel to serial register 0%
A serial to parallel register 0%
A parallel in, parallel out register 0%
A serial in, serial out register 0%
A right shift, left shift register 0%
Which among the following transistors is used only if its collector is at a fixed negative voltage?
Supergain NPN transistors 0%
Vertical PNP transistors 0%
Lateral PNP transistors 0%
Which among the following types of RAM uses a three device information storage cell on the parasitic gate?
Bipolar MOSRAM 0%
Static MOSRAM 0%
Dynamic MOSRAM 0%
Which among the given options, in the above image, is the 'diffusion law equation' where N is the amount of substance, t is time, D is diffusion coefficient, X is the position or length?
Which amplifier has infinite input and output resistance?
Voltage amplifier 0%
Current amplifier 0%
Transresistance amplifier 0%
Transconductance amplifier 0%
Which application of a read only memory is used when an address is changed by means of a counter?
Combination logic 0%
Character generator 0%
Seven segment visible display 0%
Sequence generator 0%
Look up table 0%
Which of the following techniques consists of manufacturing unit cells?
Discretionary wiring 0%
Fixed interconnection pattern manufacturing 0%
Polycell making 0%
Which type of distortion results from new frequency in the output which is not present at the input signal?
Non-linear distortion 0%
Frequency distortion 0%
Phase shift distortion 0%
Which type of transistor construction techniques consists of forming both the emitter and the collector junction by subjecting a semi-conductor to gaseous n- type and p- type impurities?
Grown type construction 0%
Alloy type construction 0%
Diffusion type construction 0%
Epitaxial type construction 0%